In order to produce semiconductor devices which are capable of operational reverse blocking voltages of 1000 volts or more, it is known to design the generated surface of a substantially wafer-shaped semiconductor body having a plurality of layer-type zones of different conductivity types so that, at least in the region where the pn-junction exits, it is frustoconical in a certain orientation. For example, in a four-layer structure for controllable semiconductor rectifiers, the generated or edge surface has a so-called double facet with two successive slopes which are each slanted in the same direction but with a different pitch. It is known that reverse blocking voltage capability increases with increase in the pitch of the slope. Such shapes are usually attained by grinding, sand-blasting or etching or a combination of these methods. These process steps required to achieve this partially require the treatment of the individual semiconductor devices, which is highly expensive and often results in undue spread of the characteristic values of these individual semiconductor devices.
A more economical production of semiconductor devices of high reverse blocking capability has been achieved by performing the process steps required for treating the semiconductor body of the individual devices while they form part of a large-area basic disc, i.e., before the individual semiconductor bodies are separated from the disc. In this manner it is possible to simultaneously make the economical application of each of the various distinct processes to a large number of such semiconductor bodies, hereinafter called semiconductor wafers, under the same process conditions. One process has been suggested in which a basic semiconductor disc, hereinafter called disc, having a large surface, and usually a structure of at least three zones of different conductivity types with higher doping in the outer zones than in the center zone, is etched according to a given pattern to produce semiconductor wafers of a smaller areal expanse in the desired planar shape and with defined double facets for high reverse blocking voltage capability. Further treatment of the semiconductor wafers, such as covering the semiconductor surface in the region of the exit of the pn-junctions with a stabilizing protective lacquer to protect it against undesired contamination and its influence on the critical surface field intensity, as well as contacting, testing and other processes, is possible only on the individual wafers thus formed.
Another process is known in which three parallel grooves are formed in both major surfaces of a disc with the pattern of the three grooves on one major surface of the disc coinciding with the pattern of the three grooves on the opposite major surface of the disc. The middle groove of each of the three parallel grooves determines the separation of the semiconductor wafers. The outer grooves determine the function-dependent configuration of the semiconductor wafers and extend, for this purpose, from the surface through the adjacent pn-junction to the highly resistive center zone adjacent to that pn-junction. These grooves are made in the disc after the required doping processes have been accomplished. The disc is thus effectively subdivided into a plurality of bodies of a smaller areal expanse while, since the disc has not yet been broken up, still allowing further process steps to be simultaneously performed on all of the semiconductor wafers. Such a process sequence assures uniform quality of the resultant semiconductor wafers. The stabilization of the semiconductor surfaces must be effected in the outer grooves since a pn-junction comes to the surface in each of them. Passivation is effected by filling the grooves with a protective lacquer or with a glass-forming substance.
Although the above process substantially fulfills the requirements of more economic manufacture of semiconductor devices by simultaneously working a plurality of semiconductor wafers while they are connected together, it has its drawbacks. For example, it is necessary that individual process steps be effected on both sides of the disc which requires special measures. Moreover, the contact coatings on the side of the wafers on which the majority of the heat is dissipated from the semiconductor devices during use are limited by the application of the grooves and this limits the heat contact surfaces so that optimum heat dissipation cannot be attained. Furthermore, a minor voltage breakthrough resistance, due to the arrangement of grooves on both sides, is determined by the thickness of the center zone remaining between oppositely disposed grooves, which limits the expanse of the space charge zones, and thus the permissible reverse voltage when the appropriate voltage is applied. Finally, the reverse blocking voltage capability is reduced because the breakthrough resistance between the center zone and a connecting lead fastened to the semiconductor wafer is not sufficient at all points in the region of the grooves which is due to unavoidable differences in the thickness of the glass layer in the grooves.